M2TECH EVO DAC User Manual download pdf

HIFACE EVO

USING I

S OUTPUT

REVISION PrB - OCTOBER 2010

M2Tech

www.m2tech.biz

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the M2Tech standard

warranty. Production processing does not necessarily include testing of all

parameters.

INTRODUCTION

The hiFace Evo is provided with an I

output which allows for low-jitter, high-

quality connection to D/A converters

provided with an I

S input.

Alas, aside the signals set, no standard is

provided for an extra-equipment I

connection. Various voltage standards,

pinouts and connectors are used in

various D/A converters which make the

connection with hiFace Evo more difficult.

This application note focuses on signals

voltage and format adaptation in order to

have hiFace Evo working with all D/A

converters on their I

S input. The user is

supposed to be acquainted with the

various connectors and the most common

voltage standard used in this application.

VOLTAGE STANDARDS AND

CONNECTORS

Various standards and connectors are used

for I

S inputs on D/A converters. Amongst

voltage standards:

• TTL/CMOS single-ended

• TTL/CMOS differential

• LVDS

• ECL

LVDS is becoming widely used on

commercial D/A converters because of its

immunity to noise and capability to drive long

cable runs. TTL/CMOS single-ended is more

common on DAC boards for DIY’ers. hiFace

Evo offers a simple 3.3V CMOS (5V TTL

compatible) output. Amongst connectors:

• RJ-45

• HDMI

• Strip

The HDMI connector is generally associated

with LVDS format (but this is not necessarily

true, so please check specifications before

assuming that LVDS levels are carried in on

an HDMI connectors), while RJ-45 and the

strips are more commonly used with single-

ended and differential formats. hiFace Evo

uses an RJ-45, 8 pins connector with the

following pinout (left to right):

1) SDATA

2) GND

3) LRCK (FS)

4) GND

5) SCLK (BIT CLOCK)

6) GND

7) MCLK

8) GND

Signals are LVCMOS, that is CMOS levels at

3.3V supply. They are TTL-compatible, that

is, they can directly drive a 5V TTL input

stage without need for level translation. The

hiFace Evo’s I

S output is drive by a high

current driver, so it can directly feed an input

when no level translation is needed.

MCLK USAGE

The hiFace Evo’s Master Clock (MCLK) is

made available on the Evo’s I

S output. It

may be necessary on some D/A converters,

particularly when no local Master Clock is

available. Depending on the sampling

frequency, the Evo outputs two different

Master Clock frequencies: 22.5792MHz for

files with 44.1, 88.2 and 176.4kHz sampling

frequency and 24.576MHz for files with 48,

96 and 192kHz sampling frequency. Thus,

the MCLK/LRCK ratio depends on the

sampling frequency: it is 512x with 44.1 and

48kHz files, 256x with 88.2 and 96kHz files

and 128x with 176.4 and 192kHz files.

Should your D/A converter use the Evo’s

Master Clock and need a fixed ratio (for

example, 256x or 128x) at all frequencies, a

selectable frequency divider or multiplier

should be used.

A frequency divider (Fig. 1) is easily made

using D-type flip-flops like TI’s SN74LVC74

(double flip-flop which allows for 2 times and

4 times clock frequency division), while a PLL

(Fig. 2) must be used to double the Master

Clock, such as Cypress’ CY2300 (BTW, the

CY2300 is perfect to have a fixed 256x ratio,

as it offers both 2x and 1/2x frequency

outputs, along with buffered 1x output).

3.3V TO 5V LEVEL TRANSLATION

When a 5V CMOS input circuit is to be

driven, a simple level translation can be done

by using a quad non inverting buffer with TTL

1 2 3 4 5 6 7 8

Summary of Contents

Page 1 - S OUTPUT

Page 2

Page 3 - REVISION PrB - OCTOBER 2010

Page 4

Page 5

Page 6

Page 7

Page 8 - IMPORTANT NOTICE

M2TECH EVO DAC User Manual

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M2TECH EVO DAC User Manual

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